As a guest user you are not logged in or recognized by your IP address. You have
access to the Front Matter, Abstracts, Author Index, Subject Index and the full
text of Open Access publications.
This fringe session will present the current status of our still ongoing IMS-T425 compatible Transputer design in FPGA. Data path and control path are in a stable working state. Fetch unit and a basic system control unit are almost functional. Small instruction sequences can be executed from 8 Kbyte memory already. Some design details around the scheduler micro-code will be discussed. Slides used in the presentation can be downloaded from [1].
This website uses cookies
We use cookies to provide you with the best possible experience. They also allow us to analyze user behavior in order to constantly improve the website for you. Info about the privacy policy of IOS Press.
This website uses cookies
We use cookies to provide you with the best possible experience. They also allow us to analyze user behavior in order to constantly improve the website for you. Info about the privacy policy of IOS Press.